<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Coursework on Ivris Raymond</title><link>https://ivris.me/tags/coursework/</link><description>Recent content in Coursework on Ivris Raymond</description><generator>Hugo</generator><language>en-us</language><lastBuildDate>Sun, 01 Sep 2024 00:00:00 +0000</lastBuildDate><atom:link href="https://ivris.me/tags/coursework/index.xml" rel="self" type="application/rss+xml"/><item><title>Applying Graph Algorithms for MoE Token Batching</title><link>https://ivris.me/projects/moe-token-batching/</link><pubDate>Sun, 01 Sep 2024 00:00:00 +0000</pubDate><guid>https://ivris.me/projects/moe-token-batching/</guid><description>&lt;h2 id="overview"&gt;Overview&lt;a href="#overview" class="anchor" aria-hidden="true"&gt;&lt;svg xmlns="http://www.w3.org/2000/svg" viewBox="0 0 24 24" fill="none" stroke="currentColor" stroke-width="2"
 stroke-linecap="round" stroke-linejoin="round"&gt;
 &lt;path d="M15 7h3a5 5 0 0 1 5 5 5 5 0 0 1-5 5h-3m-6 0H6a5 5 0 0 1-5-5 5 5 0 0 1 5-5h3"&gt;&lt;/path&gt;
 &lt;line x1="8" y1="12" x2="16" y2="12"&gt;&lt;/line&gt;
 &lt;/svg&gt;&lt;/a&gt;&lt;/h2&gt;
&lt;p&gt;Current LLMs often leverage Expert Parallelism to improve inference throughput. This poses challenges for routing tokens between physical devices while also batching effectively for throughput optimization, particularly for long context inputs. We applied a graph-based algorithm in this project and measured its effectiveness for routing tokens among physical devices assuming a model was deployed using expert parallelism.&lt;/p&gt;</description></item><item><title>Efficient Memory Access Monitoring and Bug Detection</title><link>https://ivris.me/projects/memory-access-monitoring/</link><pubDate>Fri, 01 Sep 2023 00:00:00 +0000</pubDate><guid>https://ivris.me/projects/memory-access-monitoring/</guid><description>&lt;h2 id="overview"&gt;Overview&lt;a href="#overview" class="anchor" aria-hidden="true"&gt;&lt;svg xmlns="http://www.w3.org/2000/svg" viewBox="0 0 24 24" fill="none" stroke="currentColor" stroke-width="2"
 stroke-linecap="round" stroke-linejoin="round"&gt;
 &lt;path d="M15 7h3a5 5 0 0 1 5 5 5 5 0 0 1-5 5h-3m-6 0H6a5 5 0 0 1-5-5 5 5 0 0 1 5-5h3"&gt;&lt;/path&gt;
 &lt;line x1="8" y1="12" x2="16" y2="12"&gt;&lt;/line&gt;
 &lt;/svg&gt;&lt;/a&gt;&lt;/h2&gt;
&lt;p&gt;Many existing tools for memory tracing and bug detection rely on dynamic program analysis. For this project, we implemented ideas presented in Spindle (Wang, et al.) to perform memory tracing and bug detection using static analysis, achieving constant execution time and trace size scaling with array element count compared to the increasing time and size scaling of tools like Intel Pin and Valgrind. Our implementation is available on GitHub at &lt;a href="https://github.com/EECS-583-Group-4/final-project.git"&gt;github.com/EECS-583-Group-4/final-project.git&lt;/a&gt;.&lt;/p&gt;</description></item><item><title>RTOS Driven Autonomous Vehicle</title><link>https://ivris.me/projects/rtos-autonomous-vehicle/</link><pubDate>Mon, 22 Aug 2022 00:00:00 +0000</pubDate><guid>https://ivris.me/projects/rtos-autonomous-vehicle/</guid><description>&lt;h2 id="overview"&gt;Overview&lt;a href="#overview" class="anchor" aria-hidden="true"&gt;&lt;svg xmlns="http://www.w3.org/2000/svg" viewBox="0 0 24 24" fill="none" stroke="currentColor" stroke-width="2"
 stroke-linecap="round" stroke-linejoin="round"&gt;
 &lt;path d="M15 7h3a5 5 0 0 1 5 5 5 5 0 0 1-5 5h-3m-6 0H6a5 5 0 0 1-5-5 5 5 0 0 1 5-5h3"&gt;&lt;/path&gt;
 &lt;line x1="8" y1="12" x2="16" y2="12"&gt;&lt;/line&gt;
 &lt;/svg&gt;&lt;/a&gt;&lt;/h2&gt;
&lt;p&gt;Developed an autonomous vehicle capable of navigating around a track of reflective tape using two simple light sensors using an FPGA board. The system implemented a MicroBlaze SoC on the FPGA and utilized the FreeRTOS Kernel for scheduling.&lt;/p&gt;</description></item><item><title>Exploration of Rowhammering Techniques</title><link>https://ivris.me/projects/rowhammering-techniques/</link><pubDate>Tue, 18 Jan 2022 00:00:00 +0000</pubDate><guid>https://ivris.me/projects/rowhammering-techniques/</guid><description>&lt;h2 id="overview"&gt;Overview&lt;a href="#overview" class="anchor" aria-hidden="true"&gt;&lt;svg xmlns="http://www.w3.org/2000/svg" viewBox="0 0 24 24" fill="none" stroke="currentColor" stroke-width="2"
 stroke-linecap="round" stroke-linejoin="round"&gt;
 &lt;path d="M15 7h3a5 5 0 0 1 5 5 5 5 0 0 1-5 5h-3m-6 0H6a5 5 0 0 1-5-5 5 5 0 0 1 5-5h3"&gt;&lt;/path&gt;
 &lt;line x1="8" y1="12" x2="16" y2="12"&gt;&lt;/line&gt;
 &lt;/svg&gt;&lt;/a&gt;&lt;/h2&gt;
&lt;p&gt;Conducted a survey of various techniques for rowhammering and their implementation schemes, then produced a report on how a synthesis of new techniques may be capable of breaking some of the finalists in the NIST PQC Standardization Process by serving as the fault-injection mechanism.&lt;/p&gt;</description></item><item><title>Power Usage of AES Power Analysis Attack Mitigation Strategies</title><link>https://ivris.me/projects/aes-power-analysis/</link><pubDate>Mon, 17 Jan 2022 00:00:00 +0000</pubDate><guid>https://ivris.me/projects/aes-power-analysis/</guid><description>&lt;h2 id="overview"&gt;Overview&lt;a href="#overview" class="anchor" aria-hidden="true"&gt;&lt;svg xmlns="http://www.w3.org/2000/svg" viewBox="0 0 24 24" fill="none" stroke="currentColor" stroke-width="2"
 stroke-linecap="round" stroke-linejoin="round"&gt;
 &lt;path d="M15 7h3a5 5 0 0 1 5 5 5 5 0 0 1-5 5h-3m-6 0H6a5 5 0 0 1-5-5 5 5 0 0 1 5-5h3"&gt;&lt;/path&gt;
 &lt;line x1="8" y1="12" x2="16" y2="12"&gt;&lt;/line&gt;
 &lt;/svg&gt;&lt;/a&gt;&lt;/h2&gt;
&lt;p&gt;Analyzed the power usage characteristics of a microcontroller performing AES encryptions across a variety of AES implementations. These implementations used many variations and combinations of masking and hiding techniques to improve their resiliency against power analysis attacks.&lt;/p&gt;</description></item></channel></rss>